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Simulation Techniques to Evaluate ELK Stress during Chip Attach Process and Mitigate Failure

Description: This workshop is a hands-on tutorial on completing a simulation for this failure mode. The tutorial includes example files, analysis settings and best-known methods. The workshop will rely on the use of Ansys Sherlock, Ansys Mechanical and Ansys SpaceClaim inside the Ansys Workbench environment. Target audience: Flip chip component designers and integrators, assembly bumping designers and manufacturers, chip attach, packaging and assembly engineers

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Unit: 118 min

Cost: $105.00

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